Instructor

Dr. Robert Evans

Dr. Robert Evans

Electrical and Computer Engineering

Phone: 919-513-0987
Email: rjevans@ncsu.edu
Instructor Website

ECE 544 Design of Electronic Packaging and Interconnects

3 Credit Hours

A study of the design of digital and mixed signal interconnect and packaging. Topics covered include: single chip (surface mount and through-hole) and multichip packaging technology, packaging technology selection, electrical performance of packaging (Signal Integrity), thermal design, electrical design of printed circuit boards, backplane interconnect, receiver and driver selection, EMI control, CAD tools, and measurement issues. Also included is the design of Power Delivery Systems and Power Integrity for PCBs and on-chip. 3 credit hours.

Prerequisite

An undergraduate-level course on the sophomore or junior level in RLC and in TTL and MOS transistor circuit analysis.

Class Objectives

This class has been designed to equip students with the required knowledge and techniques so that they will be able to select amongst packaging and functional multi-chip partitioning alternatives so as to best meet the aim of the system and design systems to meet electrical delay, noise and other requirements, which includes determining technology details, selecting the appropriate active devices, placement and routing of the system.

A student will:

  • Learn about packaging and interconnect options available, including printed circuit boards, single chip packaging, both surface mount and through-hole, and multichip modules
  • Learn how to select amongst competing packaging options in order to meet system performance and cost requirements and goals
  • Learn about the fundamentals of digital circuit interconnect design, including characteristics of drivers for different logic families, impedance control, reflection noise, crosstalk noise, switching noise (ground bounce), and electromagnetic interference
  • Learn how to design printed circuit board, backplane, and multichip module interconnect to achieve electrical delay and noise (signal integrity) aims
  • Learn how to select (or design) drivers and receivers for different applications
  • Learn about timing driven design
  • Learn about the design of Power Delivery Systems for PCB and on-chip distribution (Power Integrity).
  • Learn about the design and analysis of High-Speed Serial Channel communication interfaces.
  • Learn about the thermal design of packages
  • Be exposed to industry Computer Aided Design tools that assist in this process.
  • Discuss modeling and other issues associated with these tools
  • Learn the principles of EMI control and discuss the associated rules
  • Be exposed to the considerations associates with design for testability and design for manufacturability, with emphasis on surface mount and multichip module technologies
  • Be exposed to electronic interconnect performance measurement techniques and standards.

 

Course Topics

  • Review of Electronic Interconnect Measurement Standards and Techniques
  • Overview of Packaging Technology Options
  • Relevant characteristics of digital drivers-receivers
  • Review of digital logic family characteristics
  • Timing and Noise Budgeting
  • Introduction to Transmission Line Theory
  • Delay, attenuation, and ringing
  • Crosstalk noise
  • Simultaneous Switching Noise
  • Power Delivery System Design
  • High-Speed Serial Channel design and analyses
  • EMI and EMC guidelines
  • Thermal Design

Textbook

Hall, S.H., G. W. Hall and J. McCall, High-Speed Digital System Design, First Edition. Wiley-Interscience, 2000. ISBN: 0471360902.

Course Requirements

  • Homework: Two-week cycle (20%). Six problem sets total.
  • Examinations: Two midterm (25%) and a final exam (30%).
    • All exams are open-book and open-notes
  • Projects: None

Computer and Software Requirements

Please review minimum computer specifications recommended by NC State University and Engineering Online.

You should ensure that you have moderate-speed access to the NCSU system. Simple remote usage instructions will be given near the start of the course.

Updated 11/04/2022